In this final section, we are over-viewing not just one unit, but
two, by looking at the design and data requirements for both fabrication
Good design is a combination of computer tools and common sense . . .
Common sense is the most widely distributed commodity in the world, for everyone thinks himself so well-endowed with it that those who are hardest to please in any other respect generally have no desire to possess more of it than they have.
René Descartes (1596–1650)
By the time you have completed this section, we hope that you will agree that most of the things that we identify are common sense, but common sense informed by knowledge of the perspectives of fabricator and assembler and of typical fabrication and assembly issues.
The circuit to be implemented as a board assembly consists of a series of irregular connections between components which are themselves of irregular shape and must be placed upon an irregularly shaped board, often in positions which are fixed by mechanical, thermal or electrical considerations. Many are the restrictions faced by the EDR professional!
As the number of layers on a board has increased, so the complexity of layout has increased exponentially. It is possible on a small board to have thousands of connections, none of which can cross on the same layer. Even for a relatively simple board, it is very time-consuming to produce the photographic material by hand, but the introduction of CAD techniques has made this task achievable within a reasonable time-scale. The more obvious and straightforward connections can be made automatically, and the designer is thus released to deal with more complex and important issues.
The first requirement is to ‘partition’ the whole circuit, deciding on the split between different board assemblies, and on what elements are going to be embedded in the silicon integrated circuits, and which incorporated on the board itself. This task would normally be done by the electronic design engineer, but with some input from EDR. Common sense (supported by some theory) suggests that the optimum result, in terms of performance and cost, is achieved by making best use of each of the layers of interconnect. For example, provided that the parts are both available and well away from state-of-the-art, using a higher level of silicon integration costs less than making a more complex printed circuit assembly.
At the technology definition stage, the designer selects the basic rules that determine the board’s complexity. These include the type of technology to be employed (through-hole, surface-mount or mixed), the board material, the number of layers to be used, minimum track and via sizes, and minimum spacing between objects. The rules may be determined by factors other than electrical function: for example, the design parameters of any device with a keyboard are determined by the size of the human hand. However, most decisions will be centred on cost, production quantity and the expected use of the circuit. This stage has a huge effect on the difficulties of the placement and routing processes that follow.
The circuit interconnection (‘netlist’) data now has to be entered into the CAD system. Increasingly this process of ‘schematic capture’ will be carried out using information about the design generated during circuit simulation. However, it is still relatively unusual to have the same level of integration of simulation and design as is used in developing custom integrated circuits. Circuit operation may not be checked before full manufacture, so the netlist, which determines the electrical operation of the finished system, must be correct!
At placement, the layout designer selects the physical location of components on the board, which determines the footprints. This ‘layout’ stage uses a ‘library’ which contains dimensional and connection information on each of the components to be used. Each company will have a library of the components used, and there is often a large capital expense to set this up and keep it up-to-date. Like any computer database, superseded information can cause problems.
The netlist expresses the connection between each of the physical positions defined during the placement process: ‘routing’ creates the physical netlist on the board, by inserting interconnection tracks and vias. Routing is iterative and interactive, taking into account the desired width, segment length and separation of the tracks and the design rules of board manufacturer and assembler. It has been described as ‘algorithmically challenging’! A combination of manual and automatic computer routing is usual, in order to get an optimal result: the computer is an aid to, and not a substitute for, a good designer!
The legend, solder mask and solder paste layers are derived from the component positions, but these layers are rarely viewed by the layout designer, who tends to be interested primarily in the interconnect. This can have unexpected effects on the assembler, for example, when fiducials cannot be distinguished from nomenclature. Unfortunately most CAD systems do not provide a full WYSIWYG view of the board.
CAD systems will usually include some circuit simulation, and may also allow the designer to carry out thermal analysis. This is based on worst case figures and enables predictions of ‘hot spots’ to be made. Whilst these are predictions, and will not always be 100% correct, they provide a useful means of highlighting potential problems before production.
Whilst the CAD computer will have been programmed to check data for consistency and conformance to design rules, providing a good monitor of the effectiveness of the design, just relying on this will not necessarily find every non-conformance to good practice. Table 1 is just one of many examples of a list of points which a good board layout designer should have considered.
1. Is the component layout suitable for the intended assembly method?
2. Are the components regularly distributed, giving a uniform density over the complete board?
3. Can components be inspected efficiently and reworked easily in the event of failure?
4. Has consideration been given to the method of test and to providing sufficient test points?
5. Are any adjustable components easily accessible?
6. Has consideration been given to thermal effects?
|Mechanical and electrical considerations|
7. Does the layout make good use of the panel area?
8. Has the circuit been divided into functional sub-units?
9. Has the number of different hole diameters been minimised?
10. Has adequate conductor spacing been provided?
11. Can supply line conductors withstand a short-circuit on board?
12. Have analogue and digital parts separate supply lines?
13. Are heavy components adequately fixed?
But even this kind of check does not cover every aspect of Design for Manufacturability. Assemblers in particular will want to add a more formal review of the design from the point of view of assembly and repair. It is possible (and expensive) to have to go round the loop a number of times before a fully working production board and circuit have been developed. Peter Clegg has rightly commented that one factor which increases cost is designers working in isolation!
Scarlett recommends striving for simplicity: ‘The first point to consider in the design of any multilayer board is whether the board should be a multilayer at all, or whether it should be designed as a double-sided board, possibly of greater surface area. Since the manufacture of multilayer boards always involves all the steps necessary to make double-sided boards, plus a number of other costly operations, a double-sided board will invariably be cheaper than a comparable multilayer.’
Whilst still true, this comment was made 15 years ago, and his advice must be interpreted in the light of a need for higher interconnect densities. In practice, this means selecting solutions which involve the lowest possible technology which will accomplish the task, for example, being aware that there is a trade-off between the track-gap dimensions and layer count.
Above all else, avoid over-specifying your requirements: Figure 1 shows a generalised yield:difficulty graph, which points up the need, as far as possible, to keep designs well within the boundaries of standard practice.
Table 2, a typical yield chart for outer1 layers, is a specific example of how yield losses escalate rapidly at or near the limits of capability – fine tracks (but, more importantly, fine gaps) cause significant yield losses:
1 Fabricators are generally more successful in producing fine tracks and gaps on inner layers
|0.2 mm||0.2 mm||96%|
|0.12 mm||0.12 mm||83%|
Given rapid progress in technology and expertise, today’s fabricator would probably predict higher yields, but the fact remains that pushing every aspect of the design to the limit will be costly. Just because something can be done doesn’t mean that you would be justified in designing in that way.
All data packages supplied to board fabricators and assemblers are now in digital form, although there is much reworking and reformatting of older designs. As can be seen from Table 3, a range of useful data can be produced from the schematic captured by the CAD system: manufacture is considered, placement machine drive data is developed, and the data can be used to produce the test vectors for testing the product after assembly.
|PCB photo tooling (‘artwork’)||PCB layout (‘photoplot’)|
|PCB drilling data||PCB profiling information|
|board test data||PCB bill of materials|
|assembly bill of materials||stencil pattern|
|assembly drawings||component placement position/orientation|
|AOI inspection data||circuit schematic and netlist for test|
Note that this data needs to be self-consistent, so that pads, stencils and component placement positions are correctly aligned, and its issue and updating needs to be controlled properly. Major problems experienced by fabricators and assemblers are incomplete data packages, conflicting information within the package, and design rule infringements. Any of these extend the time scales for generating tooling and delay board deliveries, as well as risking producing sub-standard product.
When the design has been finalised and the necessary checks have been carried out, it is necessary to produce the board manufacturing tools. ‘Photoplotting’ first appeared during the 1960s, replacing manual methods, often what was referred to as ‘cut and peel’. This used a sandwich of an opaque film on a transparent base: the top film was cut, using a controlled depth cutter, and areas were selectively peeled off the base. The desired pattern could either be left on the base as a positive image, by removing surrounding film, or as a negative image, removing areas corresponding to the desired pattern. Such patterns were normally cut at an enlarged scale of 5:1 or more, depending on size and complexity, and subsequently reduced by a precision photographic process. In contrast, photoplotting is normally carried out at final size, using a material which is dimensionally stable as regards both temperature and humidity.
Early plotters were ‘vector’ plotters that exposed the board image on paper or film using flashes of light to draw the traces individually. The geometry, shape and size of the features were controlled by placing a movable aperture between the light source and the film. The operations required data similar to that needed to operate an NC tool: separate commands to move to a specific XY co-ordinate, select an aperture and open or close the shutter.
This approach still affects the way in which data is transmitted. ‘Gerber format’ instructions for photoplotting originated in the early 1960s, when the Gerber Scientific Instrument Company began building large area drafting machines. For many years Gerber was the de facto standard of the board industry, although the situation is changing. Design information held in a CAD database is extracted by ‘post processing’ by a Gerber driver, to produce plotting information. The Gerber 274D format is a flexible data structure from which the user can tailor plot data to specific needs, within the capabilities of the plotting system.
The laser plotter, introduced in the early 1980s, uses ‘raster plotting’ rather than vector plotting: a laser source scans across the film and is turned on and off as necessary to build up the pattern line by line. Features such as ground planes and other polygon fills can now be imaged without the user having to resort to the complex outline and fill algorithms necessary for vector plotters. This led to the introduction of an ‘extended’ Gerber format (RS274X), which includes aperture code information within the data file, eliminating a frequent source of operator error. In this way Gerber format evolved from a description of machine tool motions to a description of the image itself, with its software supporting libraries of symbols and character sets, component rotation and scaling.
Although used world-wide, Gerber is not the ideal format for electrical test and AOI, and the language does not support netlist data. Neither is it compatible with the requirements of assembly. In the section on CAD-CAM integration we shall take a first look at this issue, and will return to the theme in the later modules Design for eXcellence and Manufacturability analysis.
Improvements in accuracy could potentially be achieved by using a photoplotter to expose the board, a concept referred to as ‘direct imaging’. Unfortunately, this needs greater light intensity than most photoplotters can provide, so that the process is a slow one, and applicable only in a prototyping situation.
Machinery for numerical controlled drilling of the board is also driven directly from the data produced: this gives information on component holes, via holes and mechanical holes. CNC drills normally use the ‘Excellon 2’ file format, another example of a de facto standard from a leading supplier. Aperture list and drill bit data are contained in a separate ASCII file.
In addition to Gerber and drill files, other information needs to be exchanged with the fabricator, such as the mechanical drawings, and a netlist file to represent the physical connectivity. The assembler will need a Bill of Materials (BoM) with a list of components and packages. Most drawing information will typically be transmitted as HPGL (plotter) files or the DXF format native to a number of mechanical drawing packages. For other information, PDF (Adobe Acrobat) files offer a secure way of transferring data which arrives in the form intended, although ASCII is often used for parts lists and placement data.
It would save countless hours and mistakes if CAD data could be transferred directly, rather than using the designer to generate files in the various formats required. For this reason, a number of fabricators have invested in design software, and will accept original source files. However, this still does not provide a totally transparent link, especially at the assembly end.
There have been many stumbling blocks to CAD-CAM integration, such as lack of agreement on naming conventions and tools being supplied without standard interfaces. The IPC 1997 Roadmap identified key needs as being for:
A number of ‘higher level’ solutions have been proposed, but many of these are overly complex and not fully supported by manufacturers. IPC2 initiatives ongoing in this area include the development of a set of specifications, for which the generic standard is IPC-2511A Generic Requirements for Implementation of Product Manufacturing Description Data and Transfer Methodology. The GenCAM format described there is intended to provide CAD-to-CAM, or CAM-to-CAM data transfer rules and parameters related to manufacturing printed boards and printed board assemblies.
2 This USA-based industry organisation originally displayed a board manufacture bias, as ‘The Institute for Printed Circuits’. It then became ‘The Institute for Interconnecting and Packaging Electronic Circuits’, but now uses just its initials combined with a statement indicating the holistic nature of the industry and its issues that seems to have stabilised as ‘Association Connecting Electronics Industries’.
But GenCAM may just be too late! In your search you will probably have come across mentions of a data format called ODB++. Introduced by Valor, this is much more than an extension of Gerber, but a fully-fledged format which contains all the information needed to fabricate, assemble and test a design. It is linked with software which allows designs to be assessed for compatibility with the processes being run by the chosen fabricator and assembler, and highlights the inevitable areas where the design is nudging at the boundaries of capability. For a full explanation, stay with us for the Manufacturability analysis module!
For any document, the writer should focus on who will be using the document and what actions or decisions the users will be making based on the document.
Cutler-Hammer PCB Design Guidelines
So you have to do it for real? With luck you will work for a company whose design system has built-in defaults for the various decisions you will be asked to make. But be aware that flexibility is there if needed, and consider whether the XYZ company standard board will have all the parameters your design needs.
Apart from the data used to generated artwork and drill files, you will have to provide your fabricator with other information:
On this last point, you will of course have taken advice about the most economic panelisation for your board, taking into account the sizes which your fabricator keeps in stock. You may also want to agree a build-up for the board, and specify controlled impedance sections, but for this level of detail you are strongly advised to seek help from your fabricator.
This is not an attempt at a complete list, but is based on some of the more usual constraints and requests for good design practice that are made in guidelines documents.
And finally: “Have I provided all the information in the right format, so that the CAM team at the fabricator have a chance of doing a fast and accurate job?”
Assemblers demand a wider variety of information. In addition to manufacturing data for the stencils and placement equipment, you may have to provide your assembly house with:
And don’t forget procurement. It is only common sense to advise the supplier about any purchased parts which are unusually high cost or long lead-time
For design, the requirements are for:
As we discovered in the Resource Booklet Board assembly processes: Manufacturing requirements outlined, most of the issues should have been thought about and if necessary discussed with the assembly team in advance. But there is the same question as with fabrication: “Have I provided all the information in the right format, so that the assembly team have a chance of doing a fast and accurate job?”
During this unit we have described in some detail the various processes by which boards are assembled. Your task is to review the needs of each of these processes, and draw up a list of the requirements which may affect your job as an EDR engineer.
Start by drawing up separate lists covering:
Then, based on the overview of the whole process which we shared at the beginning of the module, see if you can identify other areas where manufacturing requirements may impact on the design.
Finally, recall that volume manufacturing uses conveyors as links between equipment, and identify any general areas in which conveyors may place constraints on the layout.
Review your lists against the comments that are contained in the rest of this document.
In volume production, all the items of equipment we are considering are linked together with conveyors. Typically these are of the ‘rubber belt’ variety, where the board is carried on moving belts underneath its long edges. This requires a clearance at the edges, typically 5 mm, which either has to be part of the finished circuit or else a panel element which is removed at the end of processing. At printing and placement, the boards are usually taken off line, and clamped, using the same clearance area.
At wave soldering, where it is possible to solder the entire underside of a board, it is possible to link a belt conveyor to the titanium fingers of a wave soldering machine. However, where the design requires pallets to be used, manual handling will be needed: every time somebody touches a board there is both an opportunity for error and the cost involved.
Reflow soldering may use mesh conveyors for single-sided soldering, in which case manual handling is involved. However, most volume equipment uses pin conveyors, where the board is supported by pins on a moving conveyor chain. Again, this needs a minimum of 3 mm clearance.
A design issue at both wave soldering and reflow soldering is the thickness of the board. As you will remember from an earlier unit, capillary action will only take solder so far up a hole (typically 3 mm), creating upper limit thickness for the board. Thick boards are also difficult to reflow, because they soak heat from the system, and thus must be reflowed very slowly – this has consequences both for throughput and the type of paste used.
If the board is too thin, then bowing of unsupported board, which gets worse as the board rises in temperature can be a significant factor. Boards that dip below the surface of the wave soldering machine can lead to expensive and difficult-to-remove ‘flooding’ on the top surface; boards which distort during reflow soldering, and are not flattened before they cool below the glass transition temperature may develop a permanent bow. This creates difficulties for printing and placement on the second side, and the flattening of the board which may occur at printing, placement, routing or assembly into an enclosure, will stress components. As we will see in Failure mechanisms, stressed components, particularly ceramic capacitors, may fail either immediately or in the field.
Both for wave soldering and reflow soldering there are a number of ways of supporting the board, of which the most straightforward is to use a support wire. Whilst most equipment allows this to be positioned anywhere on the underside, a 4–5 mm clearance area must be allowed. Another alternative is to support the board in a template, but this involves manual handling.
The extent of any bowing problem will depend on the board size: 150 mm presents few problems; 300 mm may show bowing, especially if the board is thin; 450 mm will almost certainly need to be supported. Using smaller boards may not necessarily be the answer, because smaller panels equates to more handling and more operations at processes such as printing.
Whilst using large panels often cuts costs, there is always the issue of the ability of the supplier to handle the larger sizes. Most placement machines, for example, will handle boards up to 350 mm, but handling larger sizes uses different equipment. At placement, a larger panel can mean a greater distance between the pick and place operation, and slow the machine down. Typically placement is easier on small boards, whereas printing has the same cost independent of size for a range of boards – very small boards are difficult to handle, and large boards require large expensive stencils and correspondingly robust and expensive printers.
When it comes to conveyors and moving boards between machines in the most cost-effective way, you need to talk to your assembler, to find out their preferences. Different assembly houses operate with different equipment and in different ways. Of course, if you are creating a design capable of manufacturing several sites, you either need to go for a global manufacturer who operates a ‘common platform’ or else seek a lowest common denominator for the design.
Solder paste printing needs proper attention to aperture design and to fiducials. Ideally the apertures in the stencil should be slightly smaller than the size of the pads, as this allows a proper seal between stencil and pad, reducing the possibility of solder paste forced through the gap by squeegee action contaminating the underside of the stencil. Less solder paste in the wrong places equates to cleaner prints, so that the underside of the stencil needs cleaning less frequently. This process is expensive in both time and materials, and for the highest throughput should be kept to a minimum.
However, it is not always possible to equate this advice with the need for sufficient solder paste to create an effective and reliable joint. Certainly you do not want to run the risk of there being ‘insufficients’, as these lead to defects which are difficult to detect and rework. If in doubt, it is better to have slightly too much solder in a joint, as shorts to adjacent leads are at least easy to identify and put right.
The aperture design should ideally be optimised for the device, the solder paste, and the process. In practice, aperture designs tend to come from other sources:
3 You can look up surface mount land patterns, or calculate your own at http://www.ipc.org: go to Online-resources and databases then IPC-SM-782 Land Pattern Calculator. The first time you do this you have to register, but this is free. The JEDEC standard package information which this references is available on the same basis by registering at http://www.jedec.org: start at Free standards.
Maybe your company has invested in making sure the CAD library aligns with best practice and the preferences of your assembly partners. Or they have been rich enough to buy one of the Design for Manufacturability software aids. But more likely you will have to use whatever seems reasonable in the light of other designs which have been made without difficulty, and talk to your assembly house if there are any components outside the normal range. Particularly with fine pitch parts and with area arrays, (especially µBGAs), a lot of aggravation can be saved by asking for advice before the prototype stage (expensive) stencils.
The proper alignment of paste and board depends on two factors:
About the first of these issues you can do little other than ensure the solder paste information comes from the same revision of the art work. As explained in Solder paste printing, there are inevitable mismatches between stencil and board, so that alignment is a compromise.
Typically the assembler orders stencils and will ensure that fiducial marks are requested. These are usually aligned to fiducial marks on the metallisation of the board.
In general, fiducial marks need to be clearly differentiated from other patterns on the board, and kept clear of surrounding features, especially solder mask. This is because a fiducial partly covered by solder mask will have a different centroid from that intended and consequently the alignment will be incorrect.
A number of different types of fiducial are shown in Solder paste printing, of which by far the most common are roundels 1 mm in diameter. Typically these are at opposite corners of the board but inset slightly from each corner. SMEMA, an association of machine manufacturers have produced guidelines on this, which may be downloaded free from the IPC website.
One of the keys for placement, at least in the early stages, is the old set of Purchasing Manager’s questions: ‘How many do you want? When do you want them? How much do you want to pay for them?’ Remember that:
For volume assembly, one important factor is the number of different part types within a single circuit. Bear in mind that each part type needs at least one feeder; in fact if many parts of one particular type are used, then it may be necessary for the assembler to load several feeders with single component type. The number of feeders is important, because machines have fixed limitations – if your machine has 80 feeder ways, and you need to mount 81 feeders, then placement will need a second pass with the feeders reset, or else the work needs to be split between two placement machines.
Whilst knowledge of the machines used, together with information on the tape size for each part, would enable you to make these calculations, you are best advised to check your findings with the manufacturer. Feeder widths are generally multiples of the 8 mm standard, but there are sufficient variations in capacity to advise caution.
With placement one also has to be aware of subtle differences between components from different suppliers. With items such as chip capacitors for example, some processes will be optimised to make a flat chip, others to make a short thick chip, all within the fairly loose boundaries within the component size. The impact on placement is that variations in thickness can result in variations in pressure on the part, because there is rarely feedback on pressure with a chip shooter. The part is moved downwards (very rapidly) until a pre-determined degree of over-travel has been reached relative to the board surface. In most machines, the board surface is clamped upwards to form the reference plane, but you can understand that a thick component may be pushed too hard into the paste, potentially damaging it.
For larger components such as QFPs, the problem is less one of thickness than of differences between the outline of the package which is sufficient to make the vision system believe that the wrong component has been picked up. For both capacitors and QFPs, the solution is to change the part description within the placement software, so that the component is correctly described.
Parts for insertion share many of the same issues as placement, in terms of availability and presentation method. The number of different parts will also have an impact where insertion is carried out by machine. VCDs and DIL inserters, where the components are arranged around the machine, as with placement equipment, are more restricted in this respect that axial machines, where sequencing and placement are separate operations.
With insertion, one always has to think how the parts are going to be kept in position prior to soldering. In two cases it is straightforward:
Where wave soldering is to be used, and the parts are not clinched, there is an option of using parts whose legs are formed so as to create some interference with the holes. At the same time, the form usually provides a stand-off between board and component body which aids cleaning. Parts may be procured ready formed, or formed by the assembler. Be aware of this issue, because it can end up with expensive hand work. It is far better to buy parts ready formed, or use forming equipment that is reel fed.
Axial components nearly always require some forming in order to be fitted to boards. On an automatic insertion machine, this bending operation takes place just before insertion and is immediately followed by clinching. For hand assembly, the best quality result is obtained by performing the parts, though this usually involves cropping leads fairly short, so that they are not bent out of pitch by handling prior to insertion.
The great advantage of using either automatic insertion or proper forming tools is that the integrity of the lead into the component is not compromised. Bending a component lead without supporting it between the point of bend and the body is a recipe for unreliability.
As has been explained, reflow exposes the whole of an assembly to high temperature, whereas hand or wave soldering only heats the underside of the board. Where reflow soldering is used, the laminate and components must both be capable of surviving after temperature exposure.
Especially with reflow, given the extended life and temperature of the flux, the choice of paste is important, and paste, process and aperture design need to be compatible. Note that one of the features within the land pattern generator allows you to input you requirements for solder joint fillets.
A key factor to remember in layout is that large aggregations of components soak up available thermal energy. The result is that some areas of the board will get hotter than others. This is less of a problem with convection reflow soldering than it was with infrared, but the task of the process engineer is made more difficult by concentrating heavy components in the same area.
The choices between reflow and wave soldering are to some extent dictated by the original technology choice that was made. This choice would have taken into account the availability of components and equipment and their relative costs. It should also have identified any components unable to withstand the reflow process. In many cases these are also components for which cleaning would be inappropriate. Such components are treated as ‘non-wet’ and are hand assembled at the very end of the process with no subsequent cleaning. Non-wets have major cost implications.
If non-wets are used, these will typically be hand-inserted, and you have to remember that the holes for this must be kept clear of solder, or the task gets very difficult to do! The normal way of tackling this is to use peelable solder mask, but if you have this mask, you have to consider how to move it and what the impact of any residues might be. This is one more example of how the EDR worker’s task is one of compromise, considered in the light of the whole manufacturing problem, and not just part of it.
As with reflow, a process decision on whether to go clean or no-clean will affect components and layout. The key issues, however, in wave soldering are determined by the nature of the componentry:
Selective wave soldering needs special equipment or, most frequently, the use of pallets which both hold the board and screen all but the target areas from the wave.
Even with small components, correct orientation relative to the wave will give benefits in increased yield and reduced shadowing and bridging. Where more complex components are involved, then extra attention has to be given to this aspect. It may also be necessary to use contractors with more sophisticated wave soldering machines, for example having multiple chip waves and some means of selective de-bridging.
Whilst our discussion so far has concentrated on the items within the unit handouts, there are other processes which will impact on the designer. We have already spoken about cleaning and hand assembly, but one important area has been totally overlooked so far. That is how to get from a panel containing a number of circuits, or one circuit with some unwanted areas of board, to the ready-for-use, completed and tested circuit. The desire to protect the board suggest that this processes should be carried out as late in the day as possible, but it needs to be allowed for at the design stage.
There are many different ways of ‘break-out’, of which the most common are snapping and routing. Snap-out, which might be done by hand, in a jig, or by forcing the board over a sharp radius, depends on building in weaknesses to the structure. Often this is done by pressing or routing all but a small part of the profile, but this is a relatively expensive process. A cheaper alternative is to score the board, not with a knife in the way that term might suggest, but with a guillotine process that creates a line of weakness along which the assembly will break.
Notice the use of the word ‘assembly’ – it is often the case that break-out carried out by ham fisted operators can result in severe damage to adjacent components, and in particular to ceramic capacitors. As will be explained in the next unit, these are not always fully testable, so the problem may not be discovered until field failure occurs.
Routing, which is to use a side cutting drill, is a more delicate process, creating a better defined profile, although at the expense of having to extract some dust. As with any machining process, the head needs clearance.
It is always dangerous to write the word ‘conclusion’ on any list of issues – there will always be more. Specific points not covered so far include test, inspection and rework. So your list will grow, particularly when you come across problems that you resolve by discussion with your supplier. Do not be afraid to ask your assembly house for assistance and comment: it is much better to deal with the problem up front at the design stage, than it is to struggle with a difficult design. There will be more on these aspects in the module Design for eXcellence, but don’t wait for that module to start drawing up your own list of the issues.
Most of the design recommendations, manufacturing process controls and quality procedures are well documented. As usual, early leads were given by the military establishment, but increasingly specifications world-wide are based around those compiled by the IPC. The most relevant standards are listed in Table 4:
|Generic Standard on Printed Board Design||IPC-2221|
|Design Guidelines for Reliable Surface Mount Technology Printed Board Assemblies||IPC-D-279|
|Surface Mount Design and Land Pattern Standard||IPC-SM-782|
|Process Control Guidelines for Photo-tool Generation and UseIPC-A-311||IPC-A-311|
|Documentation Requirements for Printed Boards, Assemblies and Support Drawings||IPC-D-325|
|Information Requirements for Manufacturing Printed Board Assemblies||IPC-D-326|
|Specification for Base Materials for Rigid and Multilayer Boards||IPC-4101A|
|Guidelines and Requirements for Electrical Testing of Unpopulated Printed Boards||IPC-9252|
|Acceptability of Printed Boards||IPC-A-600|
|Acceptability of Electronic Assemblies||IPC-A-610|
|Acceptability of Electronic Wire Harnesses and Cables||IPC/WHMA-A-620|
|Generic Performance Specification for Printed Boards||IPC-6011|
|Qualification and Performance Specification for Rigid Printed Boards||IPC-6012|
|Qualification and Performance Specification for Flexible Printed Boards||IPC-6013|
|Quality Assessment of Printed Boards Used for Mounting and Interconnecting Electronic Components||IPC-TR-551|
|Requirements for Soldered Electrical and Electronic Assemblies||J-STD-001|
|Solderability Tests for Printed Boards||J-STD-003|
|Moisture/Reflow Sensitivity Classification of Plastic Surface Mount Devices||J-STD-020|
|Packaging and Handling of Moisture Sensitive Non-Hermetic Solid State Surface Mount Devices||J-STD-033|
Standards are continually being revised, and many older standards are being replaced: students are advised to consult the IPC Web site (http://www.ipc.org) for the latest status.