Failure in solder joints


Introduction

Summarising the information in Mechanical properties of metals, Stress and its effect on materials, and Solder materials, we can see that:

In short, a normal soldered connection on a printed board is not well suited to withstanding a permanent mechanical load.

The combination of low load carrying capacity and a sensitivity to cyclic stresses of the solder alloys used in electronics implies that the soldered joints have a finite life and, consequently, so does the electronic equipment in which they are used. The key consideration in design and manufacture is therefore to ensure that the expected lifetime of the soldered joints is adequate for the application.

Properly designed joints which have been properly soldered are for most purposes sufficiently reliable. However, in practice, too many joints are potential failure sources as a result of insufficient design or doubtful processing.

Three main causes of solder joint failure may be distinguished, although the mechanisms often work simultaneously, and other causes, such as corrosion, may play a role. These causes are:



Joint fracture caused by short-term loading

Solder joint cracks caused by overloading are often the result of an accident or harsh treatment. For example, when using too much force to mount a soldered assembly in position in an enclosure, or when dropping a mobile phone. In these cases the shear strength of the solder is exceeded, resulting in fracture of the joint.

The force required to fracture a soldered joint will depend on the type of board and the type of joint and, in many cases, on the amount of solder used. The following comments apply to through-hole components:

For leadless components, the amount of solder has relatively little effect on the initial strength of the joint, as measured by pull or shear tests. Forces of between 40 and 50 N are usually required to detach a soldered chip component from a circuit, for example, by pushing the component with a rod through a special hole in the substrate. In the shear test the shearing forces are higher, perhaps up to 200 N. Fracture almost always takes place outside the soldered joint proper:

Only if extremely small amounts of solder are applied (typically less than 20% of the recommended amount) are the breaking forces noticeably reduced.

Self Assessment Questions

Explain, with the aid of an appropriate equation, why a smaller solder cross-section will result in a larger applied stress.

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Joint fracture caused by creep

Solder joint fracture caused by creep is especially important at temperatures higher than room temperature, but, with common solder alloys, such cracks may be formed even at room temperature. It is therefore necessary to take care that no permanent load is present in the soldered joints (that is, less than 1 N/mm2 at 20°C and preferably no more than 0.1 N/mm2).

One potential instance of fracture caused mainly by creep occurs when an assembly has been insufficiently supported during soldering, particularly reflow. After soldering, the board may have a rather large permanent warp, but the joints are in an almost stress free condition. However, if this board is then screwed into an enclosure, whilst being firmly forced flat, very large forces are exerted on the joints. This may cause cracks during the mounting operation (overloading) or soon thereafter.

Self Assessment Questions

Explain why you would expect creep to be a problem in solder joints operating at room temperature.

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Stress caused by thermal mismatch

Having looked at failures caused by short-term overload, and by permanent loading producing creep, we move to the third and largest category of failures, the fatigue failures that result from cyclic loading. But, before we do that, we need to look at the sources of stress that induce such fatigue.

The point was well made in the early 1970s by David Boswell that surface mount assemblies have many issues in common with engineering. Although there are major differences in scale and dimensions, there are benefits from thinking in terms of the stresses imposed by the environment and the ability of the structures to withstand those stresses.

In the construction shown in Figure 1, the thermal expansions of the component and the printed board can be assumed to be different, and the thermal mismatch Du is given by:

where

De = the difference in CTE between the materials
L = the longest dimension of the component (often the diagonal)
DT = the temperature change

Figure 1: Thermal mismatch in solder joints

Figure 1: Thermal mismatch in solder joints

In most mechanical structures, such thermal mismatch would be accommodated by elastic deformation, resulting sometimes in a high stress in the structure. With soldered assemblies, however, the situation is different, as the strength of the solder is low compared with that of the usual engineering materials. With leadless components, the materials of component and substrate are comparatively so rigid that a large part of the mismatch has to be accommodated by plastic deformation in the solder joints. In this case, repeated movement due to temperature changes produces a cyclic stress (Figure 2), and fatigue failure may eventually follow.

Figure 2: CTE mismatch producing cyclic stress

Figure 2: CTE mismatch producing cyclic stress

The shear strain experienced depends on the CTE mismatch between the materials and the length : height ratio of the joint. As CTE mismatch increases, so does the strain, and thus the thermal cycling life decreases. If rigid solder joints are to survive cycling during the specified life, the component size may have to be limited or the stand-off height increased to withstand large temperature fluctuations and CTE mismatch. The Column Grid Array is an example of a package where the stand-off height is deliberately made higher than a normal BGA (by using columns of high-melting solder) in order to accommodate CTE differences between its ceramic body and a PCB substrate.

Column grid array detail

Column grid array detail

Thermal mismatch, as a cause of plastic deformation in the solder, leading to fatigue fracture, finds its origin not only in differences in CTE, but also in differing rates of temperature change. During both soldering and operational life, the rates of heating and cooling of components and substrate are in general not the same, so that temperature differences are created, even if the CTEs are matched, and these temperature differences generate stresses. In practice, the stresses fortunately remain fairly small, provided that no incorrect constructions have been used. However, if the rate of temperature change is very fast, as is the case in thermal shock testing, these stresses may become high.

Self Assessment Questions

What are three types of service conditions which could promote the onset of thermal fatigue failure of solder joints?

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So far we have been looking at rigid joints. However, with components having relatively flexible leads, a considerable part of the mismatch can be taken up as elastic deformation. But what kinds of joints are present on an assembly? And how well are they likely to stand up to thermal fatigue?

Activity

Take a good look at a complex surface mount assembly and draw up a list of the types of joint used. Are there any other types with which you are familiar?

For each type of joint, assess its likely strength and resistance to thermal fatigue. Can you think of ways in which some of the joints seek to minimise solder fatigue?

Review your answer in the light of the discussion in the following sections.

Rigid joints

The rigid lap joint occurs in a number of forms within printed circuit assemblies. It occurs on leadless chip components (Figure 3) such as chip capacitors.

Figure 3: A cross-section through solder structure – leadless chip

Figure 3: A cross-section through solder structure – leadless chip

This is one of the larger and stronger joints in the surface mount family because of the outside fillet. However, the conceptually similar joints on leadless chip carriers are by far the most troublesome type of joint, because the components are large and joints are relatively small and weak. For this reason, leadless chip carriers often have extra solder areas on the side of the carrier. Usually semicircular, these are referred to as ‘castellations’. However, it is still not proven whether such side joints improve long-term reliability, and non-uniform joints on the periphery of a carrier tend to cause stress concentration, leading to the failure of individual fillets.

Castellations on a leadless chip carrier

Castellations on a leadless chip carrier

Die/substrate and similar bonds (Figure 4) also use a lap joint, and here the limitation in component size is most evident. Where a continuous thin joint is not required (for example, for thermal reasons), then one strategy to reduce stresses is to divide the bond area into a number of discrete pads using ‘solder dams’.

Figure 4: A cross-section through solder structure – die or substrate bonding

Figure 4: A cross-section through solder structure – die or substrate bonding

Solder bumps (Figure 5), as used in the ball grid array or flip chip, represent a form of multiple lap joint in which the size of the joint elements has been defined in this way, usually by solder resist.

Figure 5: A cross-section through solder structure – solder bump

Figure 5: A cross-section through solder structure – solder bump

All forms of lap joint share the basic problem that any mismatches of CTE must be accommodated by the joint. This limits the size of the parts being joined, and joint reliability depends on:


Compliant joints

The compliant lap joint used with leaded components (Figure 6) is generally smaller than the rigid lap joint, and lead flexibility is intended to compensate for any CTE mismatches. However, lead compliance is a major factor in determining stress on the joint, and this depends on the design: there can be a >100:1 variation in joint stiffness. More seriously, if the amount of solder is excessive or uneven, this counteracts the intended flexibility of the lead.

Excessive solder reduces lead compliance

Excessive solder reduces lead compliance

Figure 6: A cross-section through solder structure – compliant leaded chip carrier (J-lead)

Figure 6: A cross-section through solder structure – compliant leaded chip carrier (J-lead)

Any expansion due to CTE mismatches will cause stress concentrations at the heel of the joint, where failure normally starts. The strength of the minimum-solder joint thus depends on the quality of the heel: while the fillet should not rise more than two-thirds of the height to the knee, it must be above the heel.

The compliant butt joint (Figure 7) is used with leaded components like plastic leaded chip carriers (PLCCs), where the lead is usually bent into a ‘J’ shape. This narrow solder fillet is very attractive for high density designs and again relies on lead geometry and flexibility to compensate for any mismatches in CTE. However, this is inherently a weak fillet, and it cannot be strengthened by placing solder on top of the lead, inside the curvature.

Figure 7: A cross-section through solder structure – compliant leaded chip carrier (gull wing)

Figure 7: A cross-section through solder structure – compliant leaded chip carrier (gull wing)

The attachment reliability is determined by:


Fracture caused by fatigue

So we have seen that there are a number of different types of joint, but all of them undergo cyclic deformation from the stresses resulting from temperature excursions combined with CTE mismatch. The extent of the deformation depends on the joint design, and whether or not there is any compliance in the system.

Usually the deformation of the solder in the joints is rather large, of the order of 1%, and the movements are slow, with typical cycle times measured in hours. Referred to as ‘low cycle fatigue’, cracking from this type of deformation may be observed in all kinds of soldered joints, and this is the main cause of eventual crack formation in initially good joints.

Estimating time-to-fail

But how long can we expect a joint to survive? Coffin and Manson2 suggested that the number of cycles-to-failure (Nf) of a metal subjected to thermal cycling is given by:

where

C = a constant, characteristic of the metal

g = another constant, also characteristic of the metal, but typically 2

DT = the range of the thermal cycle

2 The original Coffin and Manson work related cycles to failure to the shear strain by the equation

The form of this frequently-cited equation makes it clear that the time to failure will depend critically on characteristics of the material, and that fatigue will result in much earlier failure when the joint experiences wider temperature excursions. The most useful derivative of this equation is probably the relationship between the number of cycles to failure with two different thermal ranges, DT1 and DT2:

However, the Coffin-Manson equation has been criticised as a means of estimating the thermal fatigue life of solders because it was developed for temperatures below 0.5Tm, where Tm is the melting temperature in Kelvin. As previously explained, solders generally operate at high homologous temperatures. A number of alternative models, generally referred to by the phrase ‘modified Coffin-Manson’, have been used with more or less success to model crack growth in solder due to repeated temperature cycling. One such power cycling model takes the form

where

f = the cycling frequency

a = the cycling frequency exponent (typical value 0.33)

DT = the range of the thermal cycle

b = the temperature range exponent (typical value 1.9–2.0)

The final term, GTmax, is an ‘Arrhenius’ term evaluated at the maximum temperature reached in each cycle. The empirically-based model known as the Arrhenius equation3 predicts how time-to-fail (tf) varies with temperature and takes the form:

3 Although one of the earliest acceleration models, and the most successful, in the sense of being widely cited and used, for advanced electronics applications the model is increasingly being criticised. More will be said about this in Reliability and screening.

where

A = a numerical constant characteristic of the system

T = the temperature of the failure process in Kelvin

k = Boltzmann’s constant (8.617×10–5 eV/K)

E = the ‘activation energy’ in eV (electron-volts)

The Arrhenius activation energy (E) is the critical parameter in the model. Its value depends on the failure mechanism and the materials involved, and typically ranges from 0.3 up to 1.5 (and sometimes higher). As the value of E increases, the acceleration factor between two temperatures increases exponentially, as can be seen from Table 1. For GTmax, the value of E is about 1.25.

Table 1: Time-to-fail at lower temperatures relative to 150°C predicted by the Arrhenius equation
Temperature
(°C)
Temperature
(°C)
0.4 0.7 1.0 1.5
0 413 37,815 3,463,487 6,445,703,012
50 29.8 380 4,844 337,108
100 4.3 13.1 39.4 247
150 1 1 1 1

Don’t worry about the maths! The overall implications are that:

For more information on this topic, try a Google search under “Coffin-Manson model”.

Where do the cracks start?

During the fatigue process, successive metallurgical phenomena occur. As the strain in the joint exceeds the plastic limit, the solder will start to creep. However, there is the complication for tin-lead solder that the material consists of two separate phases:

This anisotropy causes internal stresses in the structure during slow thermal cycling.

As a result of these stresses, the solder exhibits phase segregation and grain growth, and the weaker a-lead phase is where cracks start and propagate during continued thermal cycling. Before the cracks start, there is usually a change in the surface appearance of the joint, which becomes rough, often having the appearance of small steps which usually develop into cracks.

What form does the fracture take?

Slow cycle fatigue has been observed with most solder joints, but in general does not affect through-hole assemblies because of their higher margin of safety. The progress of the fatigue damage of leadless components may be seen as:

The places where cracks will become visible under thermal cycling conditions are indicated in Figure 8 by the numbers 1 to 7.

Figure 8: Fatigue susceptible locations in solder joints

Figure 8: Fatigue susceptible locations in solder joints

For leadless devices:

  1. At the interface between solder and metallisation under large components such as leadless chip carriers
  2. At the vertical interface between the solder fillet and end metallisation of SM devices
  3. At the interface between solder and foil under chip components such as multilayer capacitors and resistors
  4. In the bulk of the solder fillet.

For through-hole devices:

  1. Annular cracks at the interface between solder fillet and wire
  2. In the bulk of the fillet
  3. Between joint and pad.

Cracked through-hole joint

Cracked through-hole joint

Self Assessment Questions

Explain for the benefit of a design engineer what ‘low cycle fatigue’ is, and how it can affect the life expectancy of his/her products.

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Combined creep and fatigue

The mechanisms involved when fatigue and creep act together are poorly understood, but there is evidence that the sum of their effects is greater than their individual contributions.

Since solders operate at high homologous temperatures, if they have a small stress acting on them they are effectively creeping all the time. Consequently, any form of stress or thermal cycling will introduce the unwelcome phenomenon of combined creep and fatigue. To make matters worse, duty cycles could be:

Self Assessment Questions

Comment on why combined creep and fatigue can often be a problem with solder joints.

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Other solder-related failure causes

Visible defects

So far we have considered only those failures that occur in properly-made solder joints. In practice there are many kinds of solder defects which will impact on quality if they are not detected during manufacture either visually or by electrical test. In the text that follows, we have split the failures into groups, according to how immediate a problem they present.

The first group contains a number of short-circuit and open-circuit conditions which are generally easily detected. This category includes solder shorts, which are common on wave solder parts, and with fine pitch surface mount devices. Solder wicking is generally easily seen, in that the solder sucked away from a joint by a hotter surface will generally have a bulbous appearance, but the real reliability hazard is that solder wicking may conceal a joint which has not been properly made– solder has wetted only where it could and failed to make the desired joint.

Solder short

Solder short

Solder wicking

Solder wicking

Solder wicking

Solder wicking

Similar to solder wicking is solder drainage, where solder intended to form a joint has been moved by capillary action into an unwanted crevice, often a via. Fortunately, most designers now know not to have vias close to pads without intervening solder resist.

Solder drainage

Solder drainage

The last in this group of definite problems are the varieties of open-circuit chip component where unbalanced forces during soldering have produced component lifting. Called either tombstoning or drawbridging, according to the degree of elevation, these defects will be picked up by in-circuit test, but the loss of a single capacitor is not necessarily detrimental to normal circuit function, so may not be picked up if only a functional test is used. Also, whilst tombstoning is easy to spot, drawbridging is less so, particularly with automated vision systems that look only from the top.

Tombstoning

Tombstoning

Drawbridging

Drawbridging

Potential problems

Other solder defects are more potential causes for problems than they are a cause of immediate rejection. However, they are normally picked up during visual inspection, and reworked. In this category fall solder beading and solder balling. Although often confused, the mechanisms by which these are produced are totally different: solder beading is a design fault, where excess solder paste is melted and squeezed out from underneath the capacitor; solder balling is more generally a process fault with a variety of causes, which may be related to the solder mask material. Whilst solder beading is always associated closely with components, solder balling may occur almost anywhere on the circuit.

Solder beading

Solder beading

Solder balling

Solder balling

An unrelated excess solder condition is the ‘solder spike’. Often caused by poor rework of surface mount devices, but also common with wave soldering, solder spikes can reduce clearances to below safe levels – where clearances are small, sharp, spiky lumps of conductor are undesirable.

Solder spikes

Solder spikes

Evidence of problems

Even less visible is the kind of evidence that things are not as they should be from the point of view of solder wetting to pads and leads. Poor wetting to pads and to components may result in unsoldered areas, or result in the displacement of solder to areas close to the joint with the potential to cause short circuits. Related to solderability is de-wetting, where a solder joint has been made and then destroyed by inappropriate soldering conditions. These problems may cause failures, but probably only if short-circuits are created or the volume of solder drastically reduced.

Poor tin/lead pad wetting

Poor tin/lead pad wetting

Poor solderability

Poor solderability

Dewetting of tin/lead pads

Dewetting of tin/lead pads

Holes

Less visible still, and in consequence more important for the long-term reliability of products, are lack of hole fill, pin-holes in joints, and voids. Normally a plated through-hole should be filled with solder during soldering. If a hole is not filled there is cause for concern, because it may indicate a defect in the copper plating of the barrel. This kind of defect can fail during thermal stress testing.

Microsection of poor topside solder fillets

Microsection of poor topside solder fillets

There are also concerns about unfilled through vias leading to reliability problems because of trapped process chemicals, leading to corrosion during use. The problem is particularly acute with high aspect ratio vias, which are difficult both to plate and to clean from process chemicals and flux.

Properly made joints don’t have visible holes, but pin-holes and blow-holes occur frequently in solder joints, particularly those made by wave soldering. With through-hole components, where the joints are relatively large, there is probably little reliability hazard, although holes of this nature generally indicate poor control of the soldering processes4. The general current view in the industry is that such defects are acceptable if you can see the bottom!

4 In the past, some military specifications required such joints to be reworked, but there is increasing acceptance of the fact that reworking a joint for cosmetic defects will degrade its reliability.

Pin-hole/blow-hole in solder joint

Pin-hole/blow-hole in solder joint

Voids

Potentially much more serious are the holes than one can’t see, generally referred to as ‘voids’. Both through-hole and surface mount processes suffer from voids, caused by gas bubbles that are released during the process of wetting of the surfaces to be joined and subsequent solidification of solder as the joint is cooled. These bubbles may come from the breakdown of fluxes, volatile residues from the fluxes, contamination on the surfaces being joined, and moisture or process chemicals5 trapped in through-holes and vias.

5 According to work carried out by Cogg and Lea at NPL, the main causes of voids in a through-hole joint are moisture in the board laminate, poor quality of barrel copper plating, and poor adhesion between barrel copper and laminate. Lea found that flux or process chemical entrapment did not result in the voids, as postulated by previous researchers.

Voids in surface mount solder joints are affected by the type of paste, the paste volume, joint geometry, solderability of materials and the reflow profile. Compared with wave soldering, surface mount solder joints are formed at lower temperatures, where the solder flows less well, and this increases the potential for voids. There is also a very much higher percentage of volatile components, which form an integral part of the solder paste and need to be removed during reflow. Inevitably there will be at least some small voids, although some researchers have reported reduced voiding when a nitrogen atmosphere is used.

The general belief is that a small volume of voids, uniformly dispersed throughout the joint, should have minimal impact on the integrity of that joint. However, there is corresponding concern that large voids, or excessive numbers of voids, might affect the mechanical6 and thermal characteristics of the joint. They might also affect the ability of a joint to withstand low-cycle fatigue, on the basis that voids are similar to closed cracks in form, and should therefore act as stress-raisers.

6 Typically joints have such a low electrical resistance that even orders of magnitude change in joint resistance have no discernible effect on circuit function.

But what measurable impact do voids in through-hole joints have on reliability? Some evidence7 suggests that fatigue life may in fact improve because the reduced amount of solder provides a compliant bridge between lead and barrel. On the other hand, very large voids (50% of the joint volume) can sometimes cause cracking.

7 As a result, it is now recommended that joints with voids should not be reworked, provided that they are electrically continuous.

Voids are of particular concern with the small rigid joints associated with BGAs, where the solder ball itself is the joint. Banks studied the effect of voiding on BGA reliability, and reported that voids up to 24% of the volume caused no negative effect on reliability. In fact, joints with voids had 16% better reliability than those without voids. The cracks that occurred were in the same places whether or not the joints had voids.

The issue as to whether voids affect the reliability of solder joints is still under debate. Voids can be stress raisers; equally they may act as stress relievers and crack arresters. What is clear is that the size of the voids, their distribution, and their location are critically important. Typically we try to create joints which have at most small uniformly dispersed voids, and adjust the process to achieve this.

Intermetallics

Finally in this discussion of the ‘unseen causes of unreliability’ we have to consider intermetallics. As previously explained, copper in contact with molten solder forms two distinct intermetallics between copper and tin, the h-phase Cu6Sn5 and the e-phase Cu3Sn.

Compared to the component metals, the intermetallics have a different lattice structure (Cu6Sn5 has a hexagonal close-packed structure; Cu3Sn is rhombic) and lower density. Whilst the Cu3Sn phase is normally only found on the copper surface, Cu6Sn5 crystals tend to float away from the surface and are found in the melt as hollow needles of up to 12mm in length. This is the reason that crystals of intermetallic may be found throughout a joint, not limited to the interface where they formed.

The thickness of these intermetallics will depend on temperature and time, continuing to grow at decreasing rates as copper remains in contact with liquid solder. Once the solder has solidified, the formation of intermetallics by one material dissolving in another stops. However, solid state diffusion of the elements continues, not only growing the intermetallic thickness, but also shifting the boundaries between layers. Whilst the growth of intermetallics by this process is negligible over the life of the average assembly, it can become a major issue when the temperature of the joint nears the melting point.

The intermetallic is considerably less strong than the copper-solder joint, leading to fracture at lower tensile loads. Mechanical shear tests show that the mode of fracture depends on the strain rate, ranging from ductile fracture at low strain rates to brittle fracture through the intermetallic at high rates of strain. The strength of a joint can thus be reduced by having excess intermetallics within the joint.

Having insufficient intermetallics can also cause joint failure. Viswanadham reports that forming leads after plating may lead to microcracks and oxidation of the base metal. Either this results in a thinner layer of intermetallic on the oxidised surface, or else the plating simply dissolves in the solder without forming any metallurgical bond at all. The resulting solder joint may appear visually acceptable, but is in reality much weaker, resulting in field or test failure. Such cracks generally originate at the high stress regions and propagate along the solder-lead interface, instead of through the bulk of the joint.

Interfacial cracking in a J-lead joint

Interfacial cracking in a J-lead joint

Many components8 and ENIG boards have a nickel under-plate, which does not dissolve in solder to the same extent as copper. However, the nickel forms a metallurgical bond through the d-phase intermetallic Ni3Sn4, which has a monoclinic structure. It is reported that the intermetallic layer acts as a barrier once it reaches about 2.5 µm thick, reducing the intermetallic growth significantly after that.

8 Many component leads are made of either Kovar or alloy 42, both nickel/iron alloys. These normally have a solderable finish of tin or tin-lead, so that nickel-tin intermetallic is involved in the resulting solder joint.

Self Assessment Questions

What impact do solder defects have on the reliability of solder joints?

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