So far in the module we have reviewed the need for thermal management, looked at the basic ways in which heat can be removed from an assembly, described heat generating parts at the component level, and provided both an insight into modelling software and some experiences in using a typical software package. In the final units of the module, we will be looking in more detail at the way heat can be removed, concentrating on practical aspects of the technology.
In real situations, conduction, convection and radiation all play a part in modifying the thermal behaviour of a system. However, in order to impose a degree of order on our material, this Unit and the next will concentrate on methods of heat management that depend primarily on conduction: in this relatively short Unit, on ways of enhancing conduction in the board, and in Unit 14 on using heat sinks and their derivatives.
Although in any treatment of board conductivity and heat sinks it is impossible to separate completely considerations of airflow – after all, heat has to go somewhere, and usually ends up in the environment – as much as possible of the material on forced convection has been placed in Unit 15, whilst Unit 16 will concentrate on heat management for the overall system and on equipment practice.
As we have seen earlier, when energy is dissipated in components within a printed circuit assembly, a substantial proportion of the heat is transferred through the board. So, even without using a heat sink, we can reduce junction temperature by improving the efficiency with which heat is transferred from the device through the board to the environment.
Given the disparity between the thermal conductivities of laminate and metallisation, it is not surprising that the approach of adding copper often finds favour, especially when it is not practicable or economic to add a heat sink, or where the predicted over-temperature is relatively small.
The conductivity of the substrate can be enhanced in three basic ways:
All these processes have an impact on the manufacturing cost of the board, but need not necessarily be overly expensive.
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Using thicker copper for the PCB foils is the simplest solution as it requires no extra process steps. However, there are three potential problem areas to consider:
As an alternative to improving the conductivity of the board by having internal metal planes, for assemblies with through-hole mounted components such as dual-in-line packages, it is possible to place a thick heat sink plane on the surface of the board underneath the components. Because this is easiest to implement when the packages are in a regular array, such heat sinks are often referred to as rail- or ladder-cooled, because the configuration of the plane has parallel rails or rungs. Less common than previously, this style of direct cooling is more likely to be seen in military equipment where substantial conduction to the chassis is needed.
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Increasing the copper thickness is not the only way to improve the thermal performance of a substrate, although other methods generally involve using non-standard materials and/or alternative technologies to meet size and performance targets. Three of these approaches are:
The technologies described above are of most use for specialised applications that are sufficiently thermally challenging to warrant the additional expense. All the methods have a limited supply base, and require extensive development and product qualification. With the exception of IMC, they are also significantly more costly.
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Of the strategies for using the board to extract significant amounts of heat, the most common approach has become creating thermal paths through a conventional PCB substrate. This is because of the almost universal adoption of through-hole plating for board fabrication, so that vias can be provided just for the cost of the drilling involved. In many cases, no additional processes are required.
The literature is full of ‘thermal vias’, but what makes thermal vias different to the vias used for interconnection? The answer is that, in terms of their structural behaviour and thermal characteristics, there are no differences, but thermal vias are usually more densely packed together.
The conductivity of the via will, whether used for interconnection or just for heat transfer, depend on the dimensions of the via, the thickness of the walls, whether or not it is filled, and the nature of any insulation layer on either side of the via. Taking each of these in turn:
Via dimensions and spacing
Comparing the cross-sectional area of the wall with the total area of the hole shows that multiple small vias will be more effective than a few large ones, but the choice will depend on the interconnect density and the board fabrication constraints.
This paper is also a reminder that analytical methods can be used to estimate the thermal resistance of vias with an error of less than 20%, avoiding the need for a detailed simulation. However, it shows that a one-dimensional analysis may be insufficient if significant thermal spreading occurs.
Via wall thickness
The specifications normally call up a minimum thickness of copper, based on the need to create a compliant structure that will survive temperature cycling without fracture. This predicates the use of electrolytic copper, plated so as to create a ductile deposit. Typically a minimum thickness of 25µm will be specified, but 35µm is becoming more common. There are, however, practical plating issues as to how thick this copper can be made, particularly with a hole of high aspect ratio.
Filling vias has in the past been an additional process, and one that would normally only have been carried out for via-in-pad designs, or where paste printed onto adjacent pads would otherwise fill the via by capillary action once the solder had melted.
The obvious material for via filling is solder, which is readily applied by the fabricator during the hot air solder levelling process. Here both solder coverage of the device contact area and percentage fill of the thermal vias are critical to overall thermal performance.
Where the board has a non-solder finish, the assembly process can accomplish the same result, supplying the necessary solder paste by dispensing or screen printing. However, because of the large quantity of solder paste required, the screen printing for via fill may need to be carried out as a separate process to the solder paste printing for component attach, with paste penetration into the vias assisted by applying a vacuum to the board.
An example of how these solder-filled vias can be used may be seen in this Freescale Application Note. A significant feature here is that the package has been designed and characterised for this style of assembly, and the use of the vias is commended as a low-stress alternative to soldering a metal slug directly to the source contact of the device.
An alternative method of filling the via with conductive material is of course to plate with copper. However, plating down a hole of diminishing aspect ratio is difficult, and this process is more commonly applied to blind vias.
With ceramic systems, plugged vias are normal procedure, in order to maintain a flat top surface for subsequent processing. In ceramic structures, the via fill will be the same conductive material used for the interconnection pattern.
Filled vias are also seen in high-density board structures, again to maintain a planar surface. Here vias may be plated, or alternatively plugged with conductive resin. Note that, when using conductive resin, the thermal properties of the filled via may differ little from its unfilled state.
Thermal vias will, of course, conduct electricity as well as heat. Having vias in parallel and connected together presents no problems for power packages with large pads. However, in most cases, thermal vias (or dual-purpose vias on devices such as BGAs) that are connected to active parts of the circuitry need to be insulated from each other. Solder mask is sufficient only to prevent unintended casual contact, so an electrically insulating thermal interface material will generally be used if a heat sink is to be attached on the side of the board opposite the component.
Via Fill, Via Plug, Via Cap, Via-In-Pad, Etc... So what’s the difference and why do I care?, archived from the Technology Center at the Merix.
For more information on the filling of blind microvias see Atotech’s Technologies for acid copper via filling and Ogawa, Sato and Pierce Advanced via filling methods for HDIS applications (archived file).
For a typical package, that dissipates enough heat to be uncomfortably warm, but is not severely thermally challenged, how does adding a set of thermal vias compare with using more and thicker conductor layers on the board?
To get a feel for this, use appropriate Flomerics tools to estimate the steady-state junction temperature for a typical IC package on a 4-layer board (2S2P) in both forced and natural convection conditions.
Start with a board substantially larger than the package, but where no effort has been made to improve heat distribution; then experiment with modifying the lay-up of the board, adding thermal vias and so on.
Then look at our comments.
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In the Freescale example, we have already seen mention of a traditional method of heat spreading, in which heat is removed from the package by means of tabs intimately attached to the heat-generating component. Such heat spreaders are particularly useful when they can be placed close to the device junction, where local temperatures and temperature gradients are high. Typically the heat spreader will be bonded to the semiconductor package, in order to ensure good thermal contact. However, as Freescale comment, the CTE of the heat spreader must be matched to the package to avoid stresses from expansion mismatch.
The closer we can take the heat spreader to the source of heat, the more effective it will be. For this reason, especially for high-dissipation components, the heat-spreading challenge might be more appropriately carried out by the package designer than the package user. This gives both component manufacturer and user the challenge of integrating their work more closely, and in particular of devising adequate thermal models for the device.
Thinking from a wider perspective, we can interpret the term “heat spreader” as embracing the whole range of conductive methods other than heat sinks, when we find that there are a number of different styles. We invite you to explore some of these at the k Techology Corporation web site, where you will see examples of heat spreaders, thermal cores, and heat straps. This particular vendor concentrates primarily on high-power-density applications for military users, and based on specialist graphite structures; other suppliers use different materials and designs, targeted at different applications and markets.
So far, most of the techniques discussed have been used to spread heat underneath the generating component. An alternative “inside out” approach is to apply a heat spreader to the surface, and a number of two-piece styles of heat spreader have been developed, primarily for the memory market, and for those users who attempt to over-clock their computers. As an example of this genre, visit the Vantec web site for their Iceberq DDR memory heat spreader. However, note the comment in the CyberCooler MH-100 heat spreaders review (archived file), that this style of heat spreading doesn’t necessarily achieve very much. From your knowledge of how heat flows, and of the impedance in the likely thermal paths, you should be able to appreciate why this might be so.
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Although most critical when in close proximity to the heat-generation source, materials have a substantial effect on the thermal performance of board-based thermal management systems. Adding a relatively thin copper foil to a board may have more impact than a much thicker invar insert primarily intended to constrain the TCE of the board.
Revisit the previous exercise, in which you estimated the steady-state junction temperature for a typical package, and look at the relative effect of adding to the board cores made of aluminium, copper and kovar.
Bear in mind the considerable difference in density and cost: kovar is three times heavier than aluminium, and costs nine times as much, weight for weight! Source: Technical Materials, Inc Metal Properties Selection Guide.
Copper is thermally conductive, but relatively dense, which is why aluminium is often preferred; silver is a slightly better conductor of heat, but somewhat more dense and much more expensive. But we can get still better performance by using alternative materials, in particular graphite. We have already mentioned this material, but urge you to read this paper on a new patented graphite-based material. TMS is created by encapsulating what is intrinsically a friable and electrically conductive material to create an overall system that can be either insulating or conducting, that is very flat, and that has a tailored CTE.
It is well worth keeping material developments under continual review, since the results may surprise you! For example visit the Novel Concepts web site for information on a thin planar heat spreader that can be applied to the surface of a product and gives “thermal performance greater than solid diamond”. In fact, this claim is misleading, since such heat spreaders are not made of a magic material, but use the technology we will be reviewing later in this Unit under heat pipes.
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Providing a local method of removing heat, whether by “beefing up” the board conductors, by adding thermal vias, or by providing heat spreaders, has a substantial impact on the “thermal footprint” of the device. Figure 1 shows schematically the way in which the size of the package thermal footprint is determined by competition between heat spreading and heat extraction.
Concept: Bruce Guenin
Although we have not used this terminology so far, the idea of a “thermal territory” associated with a device is useful in building a concept model of the thermal environment, and has been used to considerable effect as a tool for identifying major thermal issues. More on the thermal territory concept at this link.
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To help you review the material in this Unit , we are making available a presentation that one of the course authors made to a group of engineers attending a one-day awareness seminar. In this session, which was given after the sessions that we recommended as part of your study of Units 11 and 12,
The presentation has been “tidied up” very little, but it was a live event, so you'll probably notice some imperfections in the sound quality. We haven’t provided a script: however, you should already have read all the basic information you need in this Unit text, or have discovered it as part of the suggested reading.
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Each of these lists is in the order in which the material is referenced in the Unit text. However, note that the links to the SAQ answers are not included!
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